Confidently Characterize Validate and Debug Your USB 31 Electrical PHY Designs | Tektronix
PhyWhisperer-USB | Crowd Supply
USB 2.0 PHY IP core | Arasan Chip Systems
USB 3.0 PHY (Host/Device/OTG/Hub) - IP Solution - INNOSILICON
ULPI - Kcchao
PCIe/USB/SATA PHY Appilcation example | Renesas
USB 2.0 PHY for SoC Designs | Cadence IP
DE10-Advance Hardware Manual revC Chapter5 USB OTG - Terasic Wiki
The USB 2.0 Device IP core | Arasan Chip Systems
Mixed-Signal Verification for USB 2.0 Physical Layer IP
High Speed Inter-CHIP USB 2.0 PHY | Arasan Chip Systems
TUSB1210 data sheet, product information and support | TI.com
USB 3.0 PHY for SoC Designs | Cadence IP
USB v2.0 Soft PHY and Device Controller
USB 3.0 PHY IP Core
HSIC USB 2.0 PHY IP
Corigine Unveils First Certified SuperSpeed+ USB 3.1 Gen 2 IP with M31 28nm PHY | audioXpress
USB Component: USB Device
USB 2.0 Full High Speed Solution | NXP Semiconductors
USB 2.0 Solutions | Arasan Chip Systems
USB 2.0 PHY IP Device/Host/OTG/Hub (Silicon proven in TSMC 40LP /LL)
